1. Field of the Invention
The present invention relates to the field of semiconductor components, hereinafter referred to as power components, capable of withstanding high voltages and/or transmitting high powers. These components are vertically disposed over the whole thickness of a semiconductive layer from a low doped substrate so that they have high breakdown voltages.
2. Discussion of the Related Art
Conventionally, such power components are thyristors, triacs, bipolar transistors, power MOS transistors, insulated-gate bipolar transistors (IGBTs), etc.
Components designed to control high electrical power dissipate thermal energy. Thus, the bottom surface of these components is metallized and mounted on a heat sink. As a consequence, if it was desired to form several power components on the same chip, this has only been possible when these various components have one common terminal.
An object of the present invention is to fabricate power integrated circuits, i.e. to group on the same substrate vertical components having at least one layer constituted by a low doped portion of this substrate, the bottom surface of the substrate being metallized to be welded or connected in another suitable way to a heat sink.
To achieve this and other objects, the present invention provides for monolithically assembling vertical power semiconductor components throughout the thickness of a low doped semiconductive wafer of a first conductivity type. The bottom surface of the wafer is uniformly coated with a metallization. At least some of these components, so-called xe2x80x9cautonomousxe2x80x9d components, are formed in insulated sections of the substrate. These xe2x80x9cinsulated sectionsxe2x80x9d are laterally insulated by a diffused wall of the second conductivity type and their bottom is insulated through a dielectric layer interposed between the bottom surface of the substrate and the metallization of the bottom surface.
When the semiconductive region of the bottom surface of an autonomous component is of the first conductivity type, an overdoped region of the first conductivity type is provided on the bottom surface and an overdoped region of the first conductivity type, from which a contact is taken, is provided on the upper surface above at least a portion of the overdoped region of the bottom surface.
When the semiconductive region of the bottom surface of an autonomous component is of the second conductivity type, this region laterally extends up to an insulation wall, a contact being taken again from the upper surface of the insulation wall, the dielectric layer extending beneath the lower foundations of the insulation wall.
In at least one insulated section, logic components can be formed.
The present invention also applies to the fabrication of a monolithic diode bridge including, in a substrate of a first conductivity type, two first vertical diodes whose common cathode corresponds to a bottom surface metallization, and, in an insulated section of the substrate (the insulated section being separated from the rest of the substrate by an insulation wall of the second conductivity type), two second vertical diodes whose common anodes correspond to a layer of the second conductivity type formed on the bottom surface whose contact is taken from the upper surface through the insulation wall, the bottom surface of these two diodes being coated with an insulating layer interposed between the semiconductive wafer and the bottom surface metallization.
The invention also applies to a component forming a single-phase rectifying bridge that includes first and second pairs of head-to-tail connected diodes disposed between a.c. supply terminals, the junctions between the diodes of each pair of diodes constituting a d.c. supply terminal, and two head-to-tail Shockley diodes in antiparallel with the diodes of the first pair of diodes. The Shockley diodes and the first pair of diodes are vertically disposed in a semiconductor substrate whose upper surface includes two first metallizations forming a.c. supply terminals, and whose bottom surface includes a third metallization forming a d.c. supply terminal corresponding to the junction of the first two diodes. The second pair of diodes is disposed in an insulated section between a fourth metallization forming a d.c. supply terminal and each metallization forming an a.c. supply terminal.
According to an advantage of the invention, a plurality of vertical components can be formed on a same semiconductive substrate, first vertical components having a common electrode constituted by the bottom surface metallization, and second components being autonomous, i.e., their electrodes can be separately connected to various terminals of other components or to external terminals, none of these electrodes being constituted by the metallization of the bottom surface.
In addition, since the bottom surfaces of the autonomous components are protected by a thin insulating layer, such as a silicon oxide layer, in turn coated with the bottom surface metallization, good heat dissipation is obtained, even for the components whose bottom surface includes this thin layer that is electrically insulating but remains thermally conductive.
Although only some specific components that can be assembled to form a power integrated circuit, as well as possible associated logic circuits and some applications thereof, are described below, the invention is not limited to these particular cases. Those skilled in the art will note an analogy between the autonomous components according to the present invention and individual components of a bipolar integrated circuit. Indeed, in bipolar integrated circuits, most of the components of an integrated circuit are formed in an epitaxial layer, the individual components being mutually insulated by deep diffusions going through the epitaxial layer and their bottom being insulated by buried layers of either conductivity type. According to the present invention, the whole thickness of the substrate corresponds to the epitaxial layer and the bottom junction insulation (buried layer) is replaced with the insulating layer which is interposed between the bottom surface of the substrate and the bottom surface metallization. Those skilled in the art can use this analogy to find further variants and applications of the present invention.
The foregoing and other objects, features, aspects and advantages of the invention will become apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.